DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park Chan-Hong | - |
dc.contributor.author | Kim Ook | - |
dc.contributor.author | Kim Beomsup | - |
dc.date.accessioned | 2013-03-16T22:06:16Z | - |
dc.date.available | 2013-03-16T22:06:16Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2000-06-15 | - |
dc.identifier.citation | 2000 Symposium on VLSI Circuits, v., no., pp.242 - 243 | - |
dc.identifier.uri | http://hdl.handle.net/10203/136385 | - |
dc.language | ENG | - |
dc.title | 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching | - |
dc.type | Conference | - |
dc.identifier.scopusid | 2-s2.0-0033716165 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 242 | - |
dc.citation.endingpage | 243 | - |
dc.citation.publicationname | 2000 Symposium on VLSI Circuits | - |
dc.identifier.conferencecountry | United States | - |
dc.contributor.localauthor | Kim Beomsup | - |
dc.contributor.nonIdAuthor | Park Chan-Hong | - |
dc.contributor.nonIdAuthor | Kim Ook | - |
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