MDSP-II: A 16-bit DSP with mobile communication accelerator

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This paper describes a 16-bit programmable fixed-point digital signal processor, called MDSP-II, for mobile communication applications. The instruction set of MDSP-II was determined after a careful analysis of the global system for mobile communications (GSM) baseband functions. An application-specific hardware block called the mobile communication accelerator (MCA) was incorporated on-chip to accelerate the execution of the hey operations frequently appearing in Viterbi equalization. With the assistance of MCA, the GSM baseband functions, which need 53 million instructions per second (MIPS) on the general-purpose digital signal processors, can be performed only with 19 MIPS. The MDSP-II was implemented with a 0.6-mu m triple-layer metal CMOS process on a 9.7 x 9.8 mm(2) silicon area and was operated up to 50 MHz clock frequency.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
1999-03
Language
English
Article Type
Article
Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.34, no.3, pp.397 - 404

ISSN
0018-9200
DOI
10.1109/4.748192
URI
http://hdl.handle.net/10203/12342
Appears in Collection
EE-Journal Papers(저널논문)
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