Enhancing performance of HW/SW cosimulation and coemulation by reducing communication overhead

For system-level simulation of a complex system-on-chip design, multiple hardware simulators and emulators can be combined to work together. The simulation performance in this case is often limited by the communication overhead between simulators and emulators. To reduce the amount of communication in this heterogeneous simulation environment, we propose novel methods to find a time interval during which there are no transactions among simulators based on a dynamic prediction of transaction occurrence time for both software and hardware models. We also propose a simulator scheduling algorithm which allows the simulator to work alone without interaction with others when there is no transaction. By so doing, we reduced the amount of pure communication by a factor of 15 to 67 and, as a result, achieved a speed-up factor of 4 to 40 compared to existing lock-step simulation, as shown by experimental results with various application examples.
Publisher
IEEE COMPUTER SOC
Issue Date
2006-02
Language
ENG
Keywords

VERIFICATION; SIMULATION

Citation

IEEE TRANSACTIONS ON COMPUTERS, v.55, pp.125 - 136

ISSN
0018-9340
URI
http://hdl.handle.net/10203/122
Appears in Collection
EE-Journal Papers(저널논문)
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