Reduced thermal strain in flip chip assembly on organic substrate using low cte anisotropie conductive film

Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances, resulting in a high performance and cost-competitive packaging method, This paper describes the usefulness of low cost flip-chip assembly using electroless Ni/Au bump and anisotropic conductive films on organic boards such as FR-4, As bumps for flip chip, electroless Ni/Au plating was performed as a low cost bumping method. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with Ni3P precipitation above 300 degrees C causes an increase of hardness and an increase of the intrinsic stress. As interconnection material, modified ACFs composed of nickel conductive fillers for conductive fillers, and nonconductive fillers for modification of him properties, such as coefficient of thermal expansion (CTE), were formulated for improved electrical and mechanical properties of ACF interconnection. Three ACF materials with different CTE values were prepared and bonded between Si chips and FR-4 boards for the thermal strain measurement using moire interferometry, The thermal strain of the ACF interconnection layer, induced by temperature excursion of 80 degrees C, was decreased according to the decreasing CTEs of ACF materials. This result indicates that the thermal fatigue life of ACF flip chip assembly on organic boards, limited by the thermal expansion mismatch between the chip and the board, could be increased by low CTE ACF.
Publisher
Institute of Electrical and Electronics Engineers
Issue Date
2000-07
Language
ENG
Citation

IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING , v.23, no.3, pp.171 - 176

ISSN
1521-334X
URI
http://hdl.handle.net/10203/1219
Appears in Collection
MS-Journal Papers(저널논문)
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