InP-Based High Speed Digital Logic Gates Using an RTD/HBT Heterostructure

Publisher
IEEE
Issue Date
1999-05-16
Language
ENG
Citation

IEEE Int. Conf. on InP and Related Material, pp.419 - 422

URI
http://hdl.handle.net/10203/1169
Appears in Collection
EE-Conference Papers(학술회의논문)
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