An area efficient early Z-test method for 3-D graphics rendering hardware

Abstract

In this paper, we propose a new early z-test which requires a minimized internal memory while removing redundant z and color reads as well as texture reads. The proposed method determines whether a pixel is screened by a certain mask plane which is containing the history of a pixel's appearance in front of it. If a pixel is screened by the plane, it can be removed. Given an initial position, the method adaptively updates the plane position to maximize the rejected pixels. As a result, on average 39.9% of the memory bandwidth and 21.2% of total power consumption is saved with only a 256 B on-chip memory. The proposed method was implemented into a multimedia system-on-chip with 61 k application-specific integrated circuit (ASIC) gates using a 0.13-mu m CMOS process technology.