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150 MHz Two Stage Pipeline 32 bit x 32 bit Parallel Multiplier/Accumulator

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dc.contributor.authorKim, Lee-Sup-
dc.contributor.authorKitagaki, K-
dc.contributor.authorAraki, Y-
dc.contributor.authorOto, T-
dc.date.accessioned2013-03-14T20:37:58Z-
dc.date.available2013-03-14T20:37:58Z-
dc.date.created2012-02-06-
dc.date.issued1992-
dc.identifier.citationjapan IEICE Spring Conference Proceedings, C-572, v., no., pp.5 - 193-
dc.identifier.urihttp://hdl.handle.net/10203/113032-
dc.languageENG-
dc.title150 MHz Two Stage Pipeline 32 bit x 32 bit Parallel Multiplier/Accumulator-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage5-
dc.citation.endingpage193-
dc.citation.publicationnamejapan IEICE Spring Conference Proceedings, C-572-
dc.identifier.conferencecountryJapan-
dc.identifier.conferencecountryJapan-
dc.contributor.localauthorKim, Lee-Sup-
dc.contributor.nonIdAuthorKitagaki, K-
dc.contributor.nonIdAuthorAraki, Y-
dc.contributor.nonIdAuthorOto, T-
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EE-Conference Papers(학술회의논문)
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