A time-interleaved flash-SAR architecture for high speed A/D conversion
- Publisher
- IEEE
- Issue Date
- 2009-05-24
- Language
- ENG
- Citation
2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, pp.984 - 987
- ISSN
- 0271-4310
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
- A_time-interleaved_flash-SAR_architecture_for_h...(882.41 kB)Download
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.