Long-Term Power Minimization of Dual-Vt CMOS Circuits

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 1088
  • Download : 1009
DC FieldValueLanguage
dc.contributor.authorKim, S-
dc.contributor.authorShin, Youngsoo-
dc.contributor.authorKosonocky, S-
dc.contributor.authorHwang, W.-
dc.date.accessioned2007-08-20T02:44:40Z-
dc.date.available2007-08-20T02:44:40Z-
dc.date.created2012-02-06-
dc.date.issued2002-09-
dc.identifier.citationInt'l ASIC/SOC Conf., v., no., pp.323 - 327-
dc.identifier.urihttp://hdl.handle.net/10203/1052-
dc.languageENG-
dc.language.isoen_USen
dc.publisherIEEE-
dc.titleLong-Term Power Minimization of Dual-Vt CMOS Circuits-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage323-
dc.citation.endingpage327-
dc.citation.publicationnameInt'l ASIC/SOC Conf.-
dc.identifier.conferencecountryUnited States-
dc.identifier.conferencecountryUnited States-
dc.contributor.localauthorShin, Youngsoo-
dc.contributor.nonIdAuthorKim, S-
dc.contributor.nonIdAuthorKosonocky, S-
dc.contributor.nonIdAuthorHwang, W.-

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0