Pairing and ordering to reduce hardware complexity in cascade form filter design
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kang, H.-J. | ko |
| dc.contributor.author | Park, In-Cheol | ko |
| dc.date.accessioned | 2007-08-09T08:42:07Z | - |
| dc.date.available | 2007-08-09T08:42:07Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2003-05-25 | - |
| dc.identifier.citation | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems | - |
| dc.identifier.issn | 0271-4310 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/1017 | - |
| dc.language | English | - |
| dc.language.iso | en_US | en |
| dc.publisher | IEEE | - |
| dc.title | Pairing and ordering to reduce hardware complexity in cascade form filter design | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000184904400067 | - |
| dc.identifier.scopusid | 2-s2.0-17944391167 | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems | - |
| dc.identifier.conferencecountry | TH | - |
| dc.identifier.conferencelocation | Bangkok | - |
| dc.embargo.liftdate | 9999-12-31 | - |
| dc.embargo.terms | 9999-12-31 | - |
| dc.contributor.localauthor | Park, In-Cheol | - |
| dc.contributor.nonIdAuthor | Kang, H.-J. | - |
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