A Charging Acceleration Technique for Highly Efficient Cascode Class-E CMOS Power Amplifiers

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A cascode configuration in class-E CMOS power amplifiers (PAs) provides high reliability with respect to breakdown considerations. However, it causes a power loss due to the slow transition of a common-gate device from the triode region to the cut-off region. To minimize the power loss of cascode class-E CMOS PAs, we propose a charging acceleration technique, CAT. This method incorporates a capacitive element between the drain and the source of a common-gate device in a cascode configuration, accelerating the charging speed responsible for turning off a common-gate device instantly after a common-source device is turned off and thus minimizing power loss from the device. We compared the performance of the proposed cascode class-E PA to that of the conventional cascode class-E PA using a 0.18-mu m CMOS process. With a 3.3-V power supply, the proposed fully-integrated CMOS PA achieves 30.7 dBm of maximum output power and 45.6% of power-added efficiency (PAE) with a dynamic range of 40 dB at 1.6 GHz. According to measurements, the proposed cascode class-E PA shows improvement in PAE over the conventional class-E PA of between 5% and 9% in a 1.5 to 2.0 GHz range.
Publisher
IEEE-Inst Electrical Electronics Engineers Inc
Issue Date
2010-10
Language
English
Article Type
Article
Keywords

DESIGN; PAE; ARCHITECTURE; LOSSES; MODEL; BAND

Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.45, no.10, pp.2184 - 2197

ISSN
0018-9200
URI
http://hdl.handle.net/10203/100643
Appears in Collection
EE-Journal Papers(저널논문)
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