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Showing results 4 to 8 of 8

4
Low latency encoder algorithm & reduced memory decoder architecture for non-binary turbo codes = 다중 입력 터보 코드를 위한 저지연 부호화 알고리즘 및 저메모리 복호 구조 설계link

Park, Sook-Min; 박숙민; et al, 한국과학기술원, 2007

5
Low-power hybrid turbo decoding based on reverse calculation

Choi, HM; Kim, JH; Park, In-Cheol, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E89A, no.3, pp.782 - 789, 2006-03

6
Low-power Log-MAP decoding based on reduced metric memory access

Lee, DS; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.53, no.6, pp.1244 - 1253, 2006-06

7
Pseudo floating point representation for non-binary turbo decoder extrinsic information memory reduction

Park, SM; Kwak, J; Yoo, DS; Lee, Kwyro, IEICE TRANSACTIONS ON COMMUNICATIONS, v.E90B, pp.3250 - 3254, 2007-11

8
Tail-Overlapped SISO Decoding for High-Throughput LTE-Advanced Turbo Decoders

Yoo, Injae; Kim, Bongjin; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.61, no.9, pp.2711 - 2720, 2014-09

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