Browse by Subject CACHE

Showing results 1 to 4 of 4

1
A scheduling policy for blocked programs in multiprogrammed shared-memory multiprocessors

Jung, I; Hyun, J; Lee, Joonwon, IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E83D, no.9, pp.1762 - 1771, 2000-09

2
An autonomous SRAM with on-chip sensors in an 80-nm double stacked cell technology

Sohn, K; Mo, HS; Suh, YH; Byun, HG; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.41, pp.823 - 830, 2006-04

3
Hybrid Memory Buffer Microarchitecture for High-Radix Routers

Li, Cunlu; Dong, Dezun; Liao, Xiangke; Kim, John, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.11, pp.2888 - 2902, 2022-11

4
Reference Pattern-Aware Instant Memory Balancing for Consolidated Virtual Machines on Manycores

Hwang, Woomin; Park, Ki-Woong; Park, Kyu Ho, IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, v.26, no.7, pp.2036 - 2050, 2015-07

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