Showing results 1 to 4 of 4
Constant-Time Synchronous Binary Counter With Minimal Clock Period Hyun, Yujin; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.68, no.7, pp.2645 - 2649, 2021-07 |
Fast timing simulation of custom digital circuits through HDL modeling = 하드웨어 기술 언어 모델링을 통한 커스텀 디지털 회로의 고속 타이밍 시뮬레이션link Lee, Seongmin; Shin, Youngsoo; et al, 한국과학기술원, 2017 |
Low- and High-Frequency Extrapolation of Band-Limited Frequency Responses to Extract Delay Causal Time Responses Cho, Jaeyong; Ahn, Jangyong; Kim, Jongwook; Park, Jaehyoung; Shin, Yujun; Kim, Kibeom; Choi, Junsung; et al, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.63, no.3, pp.888 - 901, 2021-06 |
Performance Analysis of Simultaneous Collision-Free Duplexing Method in Point-to-Multipoint Environment Kim, Nam-, I; Cho, Dong-Ho, IEEE COMMUNICATIONS LETTERS, v.25, no.9, pp.2884 - 2888, 2021-09 |
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